ADT7467BBZEVB【PDF 12/72 页】BOARD EVALUATION FOR ADT7467

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ADT7467

device is now known and can be interrogated in

the usual way.

4. If more than one device’s SMBALERT output is

low, the one with the lowest device address has

priority in accordance with normal SMBus

arbitration.

5. Once the ADT7467 has responded to the alert

response address, the master must read the status

registers. The SMBALERT is cleared only if the

error condition is absent.

SMBus Timeout

The ADT7467 includes an SMBus timeout feature. If

there is no SMBus activity for 35 ms, the ADT7467 assumes

that the bus is locked and releases the bus. This prevents the

device from locking or holding the SMBus in anticipation of

receiving data. Some SMBus controllers cannot handle the

SMBus timeout feature, so it can be disabled.

Configuration Register 1 (0x40)

<6> TODIS = 0, SMBus timeout enabled (default)

<6> TODIS = 1, SMBus timeout disabled

Analog-to-Digital Converter

All analog inputs are multiplexed into the on-chip,

successive approximation, analog-to-digital converter,

which has a resolution of 10 bits. The basic input range is

0 V to 2.25 V, but the input has built-in attenuators to allow

measurement of V CCP without any external components. To

allow for the tolerance of the supply voltage, the ADC

produces an output of 3/4 full scale (decimal 768 or 300

hexadecimal) for the nominal input voltage and, therefore,

has adequate headroom to deal with overvoltages.

Voltage Measurement Input

The ADT7467 has one external voltage measurement

channel. It can also measure its own supply voltage, V CC .

Pin 14 can measure V CCP . The V CC supply voltage

measurement is carried out through the V CC pin (Pin 3).

Setting Bit 7 of Configuration Register 1 (0x40) allows a

5 V supply to power the ADT7467 and be measured without

overranging the V CC measurement channel. The V CCP input

can be used to monitor a chipset supply voltage in computer

systems.

Input Circuitry

The internal structure for the V CCP analog input is shown

in Figure 21. The input circuit consists of an input protection

diode, an attenuator, and a capacitor to form a first-order

low-pass filter that gives the input immunity to high

frequency noise.

Voltage Measurement Registers

Register 0x21 V CCP reading = 0x00 default

Register 0x22 V CC reading = 0x00 default

V CCP Limit Registers

Associated with the V CCP and V CC measurement

channels is a high and low limit register. Exceeding the

programmed high or low limit causes the appropriate status

bit to be se t. Exceeding either limit can also generate

SMBALERT interrupts.

Register 0x46 V CCP low limit = 0x00 default

Register 0x47 V CCP high limit = 0xFF default

Register 0x48 V CC low limit = 0x00 default

Register 0x49 V CC high limit = 0xFF default

Table 6 shows the input ranges of the analog inputs and

output codes of the 10-bit ADC.

When the ADC is running, it samples and converts a

voltage input in 0.7 ms and averages 16 conversions to

reduce noise; a measurement takes nominally 11 ms.

Additional ADC Functions for Voltage Measurements

A number of other functions are available on the

ADT7467 to offer the system designer increased flexibility.

Turn-off Averaging

For each voltage measurement read from a value register,

16 readings are made internally, the results of which are

averaged and then placed into the value register. For

instances where faster conversions are needed, setting Bit 4

of Configuration Register 2 (0x73) turns averaging off. This

produces a reading that is 16 times faster (0.7 ms), but the

reading may be noisier.

Bypass Voltage Input Attenuator

Setting Bit 5 of Configuration Register 2 (0x73) removes

the attenuation circuitry from the V CCP input. This allows

the user to directly connect external sensors or to rescale the

analog voltage measurement inputs for other applications.

The input range of the ADC without the attenuators is 0 V

to 2.25 V.

Single-channel ADC Conversion

Setting Bit 6 of Configuration Register 2 (0x73) places the

ADT7467 into single ? channel ADC conversion mode. In

this mode, the ADT7467 can be made to read a single

voltage channel only. If the internal ADT7467 clock is used,

the selected input is read every 0.7 ms. The appropriate ADC

channel is selected by writing to Bits <7:5> of the TACH1

minimum high byte register (0x55).

V CCP

17.5 k W

52.5 k W

35 pF

Figure 21. Structure of Analog Inputs

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